One of the trends in CMOS image sensor is the continue scale down of the pixel size. The present CMOS image sensors all have the same or close structures: the photosensitive devices such as photodiode FD and photogate in each pixel to convert the optical signal to electrical charge, a floating diffusion (FD) capacitor converting charge to voltage, and an amplifier buffering the floating diffusion capacitance from the large output bus capacitance and sending the electrical signal out of the pixel array. The pixel output signal swing is preliminary determined by the FD capacitance and the number of charge can be captured by the PD. The maximum number of charge is proportional to the size of the photodiode. In order to maintain sensor performance, large PD size and the minimum ratio (>30%) between PD size and pixel size or the fill-factor are required which limits the further reduction of pixel size. In this invention, the photodiode electrical potential, instead of the voltage at the floating diffusion, is used as the image signal and is converted to digital signal such that reductions in both the pixel size and the fill-factor are achieved without affecting the sensor performance.